Description de l'offre
You have a unique way of looking at the world. We want to see it.
Step inside our world and you'll find one brilliant mind after another working together in a spirit of collaboration that is simply contagious. And through this shared dedication-this culture of innovation and exploration-we do more than deliver the latest technologies. We deliver the future. See for yourself. Look Inside.
We invite you to join our creative and flexible Mobile-IP Team as a Digital Design Engineer in Munich. As a member of the innovative worldwide Intel Communication and Devices Group iCDG you will work with leading-edge IPs and technologies to revolutionize Mobile Computing.
As a Digital Design Engineer you will be part of a talented and highly committed team of engineers that develops, maintain and support complex digital IPs for wireless baseband applications. You will be responsible for architecting, implementing and supporting of digital HW components for System-on-Chip projects throughout the entire chip development process.
Key aspects of this assignment are:
· Micro-architecture development and RTL design
· Functional Verification based on coverage goals
· Constraining, logic synthesis and STA
· Implementation of DfT structures
· IP design automation and their delivery & support through its life cycle
Inside this Business Group
Communication & Devices Group: The wireless revolution at Intel! We are one team - passionate engineers and technologists from diverse industry backgrounds working together to realize a world of connected computing. We are bringing the best ideas from the brightest minds to deliver future mobile experiences into the market. We are on the journey towards making Intel a wireless leader with exciting products for the Internet of Things, 5G and an opportunity to change the world with your work.
· You should hold a Master's degree and/or a Ph.D. in Engineering, Computer Science or related field and have a solid educational background in IC design.
· Strong expertise in IP concept, RTL design, DfT, functional verification and automation using standard SoC technologies, architectures and methodologies
· Expertise in coverage-driven constraint-random functional verification using e or SystemVerilog
· Excellent hardware knowledge in the fields of CPU Subsystems, interconnects and on-chip bus systems
· A strong demonstrated commitment to teamwork
· Strong communication skills with the ability to work with multinational cross-functional teams
· High motivation to learn leading edge technologies and willingness to take initiative
· Subproject or technical leadership experience will be an added plus