Expire bientôt Airbus

Final Thesis within Space Equipment – Engineering, Design & Development: Implementation of a navigation clock assessment algorithm for space applications

  • Doktorarbeit
  • Munich (Upper Bavaria)
  • Design / UX / UI

Description de l'offre

Airbus DS GmbH

Airbus is a global leader in aeronautics, space and related services. In 2017, it generated revenues of € 67 billion and employed a workforce of around 130,000. Airbus offers the most comprehensive range of passenger airliners from 100 to more than 600 seats. Airbus is also a European leader providing tanker, combat, transport and mission aircraft, as well as Europe’s number one space enterprise and the world’s second largest space business. In helicopters, Airbus provides the most efficient civil and military rotorcraft solutions worldwide.

Our people work with passion and determination to make the world a more connected, safer and smarter place. Taking pride in our work, we draw on each other's expertise and experience to achieve excellence. Our diversity and teamwork culture propel us to accomplish the extraordinary – on the ground, in the sky and in space.

Description of the job

Are you looking for a final year project? Would you like to discover the world of Airbus? Then apply now! We look forward to you joining us!

Start: as soon as possible
Duration: 6 months

You will write your final thesis in the department Space Equipment – VHDL Engineering Germany

Tasks & accountabilities

You will write your final thesis in the Engineering/Design & Development department which specialises in the development of On-board FPGA/ASIC logic and processor solutions for satellite subsystems and on-board scientific instruments. In this scope, a clock assessment algorithm has to be implemented, in order to detect unhealthy clocks and thus improve the availability of the overall system.

Your role will involve the following exciting tasks:

o Understand and replay the Simulations of the algorithm on Matlab Simulink
o If necessary, adapt them for VHDL oriented implementation
o Evaluate the FPGA technology, suitable for space, for the algorithm implementation
o Evaluate the algorithm resources needs for FPGA implementation
o Perform all steps to define, implement and test (vs Matlab) the algorithm into a the FPGA
o Documentation associated to the VHDL development process

This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the Company’s success, reputation and sustainable growth.

Required skills

You offer:

o You are an enrolled student (m/f) within Electrical Engineering, Telecommunication Engineering or similar field of study
o You have gained experience in tools like FPGA Design Tools, Modelsim, Matlab/Simulink
o You are proficient in the Programming Languages VHDL
o You are experienced and excited by new FPGA architectures and signal processing algorithms
o Languages: English is mandatory; French or German would be an asset
o You are a good team player, have excellent communication skills, and are able to work independently